A power MOSFET is a field effect transistor (FET) having a silicon dioxide insulating layer as an oxide insulating layer, a gate isolated from a emission source conduction channel included in a semiconductor substrate by the oxide insulating layer, and requires a gate input pulse voltage for charging or discharging input charges. The power MOSFET consumes less power than bipolar transistors.
The power MOSFET further includes source, drain, a plurality of body regions formed in the semiconductor substrate, and a gate oxide film and a gate formed on and/or over the semiconductor substrate. Metal wirings for applying electrical signals are electrically connected via contacts to upper sides of the source, drain, and gate electrodes.
Particularly, in a power MOSFET, an n+-type layer and an n−-type layer are formed on and/or over a semiconductor substrate, and a p-type diffusion region and an n+-type region are alternately formed on and/or over a bottom surface and an uppermost surface of the substrate. The gate electrode is formed on and/or over the substrate at a position which intersects the p-type diffusion region between a pair of n+-type regions with an insulating layer interposed therebtween, and the source electrode coated with glass is formed on and/or over the uppermost surface of the substrate such that the p-type diffusion region and the n+-type regions are connected.
Because the drain electrode may be formed on and/or over the bottom surface of the substrate, a channel between the source region and the drain region may be longitudinally formed and may be controlled by the gate. The electrodes may be led out via a gate pad and a source pad formed on and/or over the substrate such that the gate electrode and the source electrode are electrically connected to an external device.
When a voltage is applied to the gate and the semiconductor substrate is connected to ground GND, an insulator and electrodes located on and/or over and beneath the insulator form a capacitor. When a positive (+) voltage is applied to the gate, positive (+) charges are formed in the gate and negative (−) charges are formed right beneath the insulator in a P-type substrate. At this time, the amount of positive (+) charges and negative (−) charges formed at both sides of the insulator should be equal. When a sufficient voltage is applied, a path such as a channel may be formed between the two N+-type (source and drain) regions by the negative charges. When a voltage is applied to the drain in such a state, current flows along the channel. However, when the gate voltage is stopped, the channel disappears, and thus, current does not flow. Consequently, even when a constant voltage is continuously applied to the drain, the current flowing in the drain may be adjusted by adjusting the voltage applied to the gate.
As illustrated in example FIGS. 1A and 1B, a power MOSFET may include cell or body 1 surrounded and isolated by gate 2. Body 1 may be extracted from the surface of a semiconductor substrate in order to prevent a varying potential thereof. The ratio between the area of body 1 and the overall area is large. Accordingly, the area of body 1 significantly increases in a device requiring high current driving capability. Because single source 3 applies electrons to gate 2, a contact portion between gate 2 and source 3 may be small, and thus, the current driving efficiency deteriorates.